R. O. Lussow, "Internal Capacitors and Resistors for Multilayer Ceramic Modules," IBM Technical Disclosure Bulletin 20, No. 9, 3436-7 (Feb. 1978) describes a multilayer ceramic module with a capacitor built into the structure in the form of a ceramic disc coated on both sides with metallurgy located in contact with vias and between a pair of green sheets. Alternatively, a via hole in a green sheet is filled with dielectric paste to form a capacitor (in FIG. 4 thereof). C. D. McIntosh, "Multilayer Ceramic Sandwiches," IBM Technical Disclosure Bulletin 16, No. 1, 43 (June 1973) shows a number of layers of stacked low and high k dielectric layers and glass with inserts into the structure (in FIG. 2 thereof) of varying values of k without any connection of electrodes to the structure as an illustration of a broad possibility of a type of "Multilayer Ceramic" (MLC) structure which can be fabricated.
U.S. Pat. No. 3,813,773 describes stamping a metallic sheet to provide openings and filling those openings with a dielectric material. The dielectric provides electrical isolation rather than capacitance.
C. M. McIntosh and A. F. Schmeckenbecher, "Packaging of Integrated Circuits," IBM Technical Disclosure Bulletin 15, No. 6, 1977-1980 (Nov. 1972) describes location of a capacitor within a laminated structure of performed insulator sheets with vertical interconnections provided by metallic vias. A single isolated capacitor is shown. The amount of capacitance is limited. The insulator sheets are rigid and are not fabricated from ceramic green sheets. Air space exists between the insulator sheets.
U.S. Pat. No. 3,267,342 of Pratt et al. entitled, "Electrical Capacitor," describes a buffer layer of a crystallized vitreous material fused to a substrate. A metallic capacitor plate formed of finely divided metal is used with the vitreous material. Another dielectric layer of partly crystallized vitreous material is fused to the capacitor plate. A portion of the plate extends beyond the dielectric. The buffer layer has a coefficient of expansion compatible with that of the dielectric layer. An additional capacitor plate and an additional buffer layer are included.
McIntosh and Schmeckenbecher, "Low Dielectric Constant Pockets in Multilayer Ceramic Modules,"IBM Technical Disclosure Bulletin 17, No. 3, 862-863 (Aug. 1974) shows formation of low dielectric areas within a laminated green sheet structure. A metal paste and a filter paste are applied to provide low dielectric constant pockets around conductors sandwiched within the ceramic module.
Brownlow, "Stress Avoidance in Cofired Two Material Ceramics," IBM Technical Disclosure Bulletin 22, No. 9, 4256-4257 (Feb. 1980) shows sandwiching a capacitor structure between two plastic-ceramic layers and a resin-ceramic layer. The capacitor is located in a hollow air space because of the incorporation into the unfired substrate of a material which is volatile and burns off during firing of the ceramic material.
A copending U.S. patent application Ser. No. 106,640, filed Dec. 26, 1979 of Feinberg et al (docket FI979-059) entitled "Thick Film Capacitor Having Very Low Internal Inductance" describes decoupling capacitors with low inductance achieved by stacking closely spaced ceramic sheets having metallized plates and connecting the ends of the plates to respective electrodes in such a way that current flows in opposite directions through adjacent facing plates. Alternate pairs of plates are connected to alternate electrodes.
An object of this invention is to provide a ceramic chip carrier or interposer structure with built in capacitance having a large value of capacitance, and a low and well matched coefficient of thermal expansion for the entire structure to minimize mechanical stresses caused by mismatch of coefficients of thermal expansion between the materials of the structure and the high dielectric material.
Another object of this invention is to provide a structure with a high value of capacitance, minimal inductance, and an integral structure with minimum stress composed of a large number of individual capacitors which preferably are connected in parallel.
Still another object of this invention is to provide a ceramic capacitor structure with minimal mechanical stresses, minimal inductance, and a maximum value of capacitance.